244 lines
8.4 KiB
C
244 lines
8.4 KiB
C
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/**
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****************************************************************************************
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*
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* @file core.h
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*
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* @brief Header file - Core State and Mode Configuration Driver
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*
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****************************************************************************************
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*/
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#ifndef _CORE_H_
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#define _CORE_H_
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#include <stdint.h>
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/*
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* DEFINES
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****************************************************************************************
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*/
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/// Bits field of Reset Source/Reason
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enum rst_src_bfs
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{
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// Reset Reason
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RSN_POR12_BK_BIT = (1 << 0),
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RSN_LVD33_OUT_RST_BIT = (1 << 1),
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RSN_BOD12_OUT_RST_BIT = (1 << 2),
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RSN_PIN_RSTN_BIT = (1 << 3),
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RSN_POR12_CORE_BIT = (1 << 4),
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RSN_IWDTRST_BIT = (1 << 5),
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RSN_CHIPRST_BIT = (1 << 6),
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RSN_SYSRST_BIT = (1 << 7),
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// Wakeup Source from poweroff state
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RSN_IO_WKUP_BIT = (1 << 8),
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RSN_BLE_WKUP_BIT = (1 << 9),
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RSN_RTC_WKUP_BIT = (1 << 10),
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RSN_INT_WKUP_BIT = (1 << 11),
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};
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/// Exit poweroff via BLE Wakeup
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#define RSN_IS_BLE_WKUP(rsn) (((rsn) & (RSN_BLE_WKUP_BIT | RSN_POR12_CORE_BIT)) == (RSN_BLE_WKUP_BIT | RSN_POR12_CORE_BIT))
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/// clock stable time for exit from deepsleep
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#define CFG_PMU_CLK_STB(time) ((time) << APBMISC_CLK_STB_TIME_LSB)
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/// default value for pmu contrl
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#define CFG_PMU_DFLT_CNTL (CFG_PMU_CLK_STB(0x3F))
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/// Bits field of Wakeup Control
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enum wkup_ctrl_bfs
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{
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// BLE SEL - bit[1:0] (deepsleep or poweroff)
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WKUP_BLE_SEL_LSB = 0,
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WKUP_BLE_SEL_MSK = (0x03 << WKUP_BLE_SEL_LSB),
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// BLE LATCH_N - bit2 (only poweroff)
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WKUP_BLE_LATCH_N_POS = 2,
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WKUP_BLE_LATCH_N_BIT = (1 << WKUP_BLE_LATCH_N_POS),
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// Wakeup IO EN - bit3 (deepsleep or poweroff)
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WKUP_IO_EN_POS = 3,
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WKUP_IO_EN_BIT = (1 << WKUP_IO_EN_POS),
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// RTC EN - bit4 (deepsleep or poweroff)
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WKUP_RTC_EN_POS = 4,
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WKUP_RTC_EN_BIT = (1 << WKUP_RTC_EN_POS),
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// IO LATCH_N - bit5 (only poweroff)
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WKUP_IO_LATCH_N_POS = 5,
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WKUP_IO_LATCH_N_BIT = (1 << WKUP_IO_LATCH_N_POS),
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};
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#define CFG_WKUP_PWROFF_MSK (0x1B)
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#define CFG_WKUP_DEEPSL_MSK (0x1B)
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/// Bits field of Wakeup Status
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enum wkup_st_bfs
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{
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// IO_WKUP_ST - bit0 (deepsleep or poweroff)
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WKUP_ST_IO_POS = 0,
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WKUP_ST_IO_BIT = (1 << WKUP_ST_IO_POS),
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// BLE_WKUP_ST - bit1 (deepsleep or poweroff)
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WKUP_ST_BLE_POS = 1,
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WKUP_ST_BLE_BIT = (1 << WKUP_ST_BLE_POS),
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// RTC_WKUP_ST - bit2 (deepsleep or poweroff)
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WKUP_ST_RTC_POS = 2,
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WKUP_ST_RTC_BIT = (1 << WKUP_ST_RTC_POS),
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// AON_PMU_INT - bit3 (deepsleep or poweroff)
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WKUP_ST_AON_POS = 3,
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WKUP_ST_AON_BIT = (1 << WKUP_ST_AON_POS),
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// BOD12_OUT12_ST - bit8 (deepsleep or poweroff)
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WKUP_ST_BOD12_POS = 8,
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WKUP_ST_BOD12_BIT = (1 << WKUP_ST_BOD12_POS),
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// LVD33_OUT12_ST - bit9 (deepsleep or poweroff)
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WKUP_ST_LVD33_POS = 9,
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WKUP_ST_LVD33_BIT = (1 << WKUP_ST_LVD33_POS),
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};
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#define CFG_WKUP_ST_MSK (0x030F)
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#define CFG_WKUP_ST_CLR_MSK (0xC00000)
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/// BLE as wakeup source
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#define CFG_WKUP_BLE_EN (1 << WKUP_BLE_SEL_LSB)
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/// RTC as wakeup source
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#define CFG_WKUP_RTC_EN (WKUP_RTC_EN_BIT)
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/// IO as wakeup source
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#define CFG_WKUP_IO_EN (WKUP_IO_EN_BIT)
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/// Bits field of LDO Control
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enum ldo_ctrl_bfs
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{
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// BOD ctrl - bit[2:0], bit3, bit4
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LDO_BOD_TRIM_LSB = 0,
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LDO_BOD_TRIM_MSK = (0x07 << LDO_BOD_TRIM_LSB),
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LDO_BOD_EN_POS = 3,
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LDO_BOD_EN_BIT = (1 << LDO_BOD_EN_POS),
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LDO_BOD_RSTEN_POS = 4,
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LDO_BOD_RSTEN_BIT = (1 << LDO_BOD_RSTEN_POS),
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// LDO12 ibsel - bit[9:5]
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LDO_IBSEL_LSB = 5,
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LDO_IBSEL_MSK = (0x1F << LDO_IBSEL_LSB),
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// LVD ctrl - bit10, bit[13:11], bit14
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LDO_LVD_EN_POS = 10,
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LDO_LVD_EN_BIT = (1 << LDO_LVD_EN_POS),
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LDO_LVD_SEL_LSB = 11,
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LDO_LVD_SEL_MSK = (0x07 << LDO_LVD_SEL_LSB),
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LDO_LVD_RSTEN_POS = 14,
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LDO_LVD_RSTEN_BIT = (1 << LDO_LVD_RSTEN_POS),
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// ANA resv - bit[24:16]
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LDO_ANA_RESV_LSB = 16,
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LDO_ANA_RESV_MSK = (0x1FF << LDO_ANA_RESV_LSB),
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// MISC ctrl - bit[29:25]
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LDO_TESTA_XO_POS = 25,
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LDO_TESTA_XO_BIT = (1 << LDO_TESTA_XO_POS),
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LDO_BOD_TESTEN_POS = 26,
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LDO_BOD_TESTEN_BIT = (1 << LDO_BOD_TESTEN_POS),
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LDO_BOD_INTEN_POS = 27,
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LDO_BOD_INTEN_BIT = (1 << LDO_BOD_INTEN_POS),
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LDO_LVD_INTEN_POS = 28,
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LDO_LVD_INTEN_BIT = (1 << LDO_LVD_INTEN_POS),
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LDO_VBK_TESTEN_POS = 29,
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LDO_VBK_TESTEN_BIT = (1 << LDO_VBK_TESTEN_POS),
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// Mask for EN bits
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LDO_BOD_ENB_MSK = (LDO_BOD_EN_BIT | LDO_BOD_RSTEN_BIT | LDO_BOD_INTEN_BIT),
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LDO_LVD_ENB_MSK = (LDO_LVD_EN_BIT | LDO_LVD_RSTEN_BIT | LDO_LVD_INTEN_BIT),
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};
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#define CFG_BOD_TRIM(val) ((val) << LDO_BOD_TRIM_LSB)
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#define CFG_BOD_EN(en, rst, irq) \
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(((en) << LDO_BOD_EN_POS) | ((rst) << LDO_BOD_RSTEN_POS) | ((irq) << LDO_BOD_INTEN_POS))
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#define CFG_LVD_SEL(val) ((val) << LDO_LVD_SEL_LSB)
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#define CFG_LVD_EN(en, rst, irq) \
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(((en) << LDO_LVD_EN_POS) | ((rst) << LDO_LVD_RSTEN_POS) | ((irq) << LDO_LVD_INTEN_POS))
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/*
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* FUNCTION DECLARATION
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****************************************************************************************
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*/
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/**
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****************************************************************************************
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* @brief Get ldo register value.
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*
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* @param[in] ctrl PMU_ANA_CTRL[23:0] & ANAMISC_CTRL[29:24].
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****************************************************************************************
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*/
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void core_ldoset(uint32_t ctrl);
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/**
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****************************************************************************************
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* @brief Get ldo register value.
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*
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* @return value. PMU_ANA_CTRL[23:0] & ANAMISC_CTRL[29:24].
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****************************************************************************************
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*/
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uint32_t core_ldoget(void);
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/**
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****************************************************************************************
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* @brief Core Sleep Mode.
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*
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* @param[in] cfg_wkup Bits field of value @see enum wkup_ctrl_bfs.
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*
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* @return wake-up status @see wkup_st_bfs.
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****************************************************************************************
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*/
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uint16_t core_sleep(uint16_t cfg_wkup);
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/**
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****************************************************************************************
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* @brief Set IO wake-up sleep or power off.
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*
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* @param[in] wkup_en IO that supports wake-up(one bit one io).
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* @param[in] pad_pu IO that pull-up(one bit one io).
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*
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* @note pad_pu Corresponding bit 1:Falling edge wake-up, 0: Rising edge wake-up.
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****************************************************************************************
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*/
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void wakeup_io_sw(uint32_t wkup_en, uint32_t pad_pu);
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/**
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****************************************************************************************
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* @brief Core Power Off Mode.
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*
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* @param[in] cfg_wkup Bits field of value @see enum wkup_ctrl_bfs.
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*
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* @note PA19 Restore PULL-UP and Input Enable.
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****************************************************************************************
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*/
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void core_pwroff(uint16_t cfg_wkup);
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/**
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****************************************************************************************
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* @brief Release IO Latch.
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****************************************************************************************
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*/
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void core_release_io_latch(void);
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/**
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****************************************************************************************
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* @brief Get IC 128bits Unique ID.
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*
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* @param[in] size Length of Unique ID Buffer.
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* @param[out] unique_id Pointer of Unique ID buffer.
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*
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* @note size must be less than or equal to 16.
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* @note IC Must have Flash.
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****************************************************************************************
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*/
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void core_unique_id(uint8_t size, uint8_t *unique_id);
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#endif // _CORE_H_
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