226 lines
8.2 KiB
ArmAsm
226 lines
8.2 KiB
ArmAsm
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;ChipId: B6x
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;Stack Configuration------------------------------------------------------------
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Stack_Size EQU 0x600
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AREA STACK, NOINIT, READWRITE, ALIGN=3
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Stack_Mem SPACE Stack_Size
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__initial_sp
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;-------------------------------------------------------------------------------
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;Heap Configuration-------------------------------------------------------------
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Heap_Size EQU 0x200
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AREA HEAP, NOINIT, READWRITE, ALIGN=3
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__heap_base
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Heap_Mem SPACE Heap_Size
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__heap_limit
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;-------------------------------------------------------------------------------
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PRESERVE8
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THUMB
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; Vector Table Mapped to Address 0 at Reset-------------------------------------
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AREA RESET, DATA, READONLY
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EXPORT __Vectors
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__Vectors DCD __initial_sp ; 0, load top of stack
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DCD Reset_Handler ; 1, Reset Handler
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DCD NMI_Handler ; 2, NMI Handler
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DCD HardFault_Handler ; 3, Hard Fault Handler
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DCD 0 ; 4, Reserved
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DCD 0 ; 5, Reserved
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DCD 0 ; 6, Reserved
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DCD 0 ; 7, Reserved
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DCD 0 ; 8, Reserved
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DCD 0 ; 9, Reserved
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DCD 0 ; 10, Reserved
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DCD SVCall_Handler ; 11, SVCall Handler
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DCD 0 ; 12, Reserved
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DCD 0 ; 13, Reserved
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DCD PendSV_Handler ; 14, PendSV Handler
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DCD SysTick_Handler ; 15, SysTick Handler
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; External interrupts
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DCD EXTI_IRQHandler ; 0, EXTI
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DCD IWDT_IRQHandler ; 1, IWDT
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DCD BLE_IRQHandler ; 2, BB
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DCD DMAC_IRQHandler ; 3, DMAChannel
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DCD BB_LP_IRQHandler ; 4, BB_LowPower
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DCD BTMR_IRQHandler ; 5, BTMR
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DCD CTMR_IRQHandler ; 6, CTMR
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DCD ATMR_IRQHandler ; 7, ATMR
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DCD RTC_IRQHandler ; 8, RTC
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DCD I2C_IRQHandler ; 9, I2C
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DCD SPIM_IRQHandler ; 10, SPI Master
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DCD SPIS_IRQHandler ; 11, SPI Slave
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DCD UART1_IRQHandler ; 12, UART1
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DCD UART2_IRQHandler ; 13, UART2
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DCD AON_PMU_IRQHandler ; 14, PMU
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DCD LVD33_IRQHandler ; 15, LVD
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DCD BOD12_IRQHandler ; 16, BOD
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DCD USB_IRQHandler ; 17, USB
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DCD USB_SOF_IRQHandler ; 18, USB_SOF
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DCD FSHC_IRQHandler ; 19, FSHC
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DCD MDM_IRQHandler ; 20, MODEM
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DCD RF_IRQHandler ; 21, RF
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__Vectors_End
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__Vectors_Size EQU __Vectors_End - __Vectors
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;-------------------------------------------------------------------------------
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AREA |.INT|, CODE, READONLY
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;Reset Handler------------------------------------------------------------------
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Reset_Handler PROC
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EXPORT Reset_Handler [WEAK]
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IMPORT __main
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IMPORT core_vector
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IMPORT trim_load
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;#ifndef CACHE_USE_SRAM
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IF :LNOT::DEF:CACHE_USE_SRAM
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;cache cfg
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;SYSCFG->CACHSRAM_CFG = 0;
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MOVS R0, #0x00
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LDR R1, =0x4000102C
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STR R0, [R1]
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;CACHE->CRCR0.Word = 0x18004025;
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LDR R0, =0x18004025
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LDR R1, =0x1900000C
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STR R0, [R1]
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;CACHE->CCFR.CACHE_INST_DATA = 1;
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;MOVS R0, #0x08
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;LDR R1, =0x19000004
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;STR R0, [R1]
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;CACHE->CCR.CACHE_EN = 1;
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MOVS R0, #0x01
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LDR R1, =0x19000000
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STR R0, [R1]
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ENDIF
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; copy vector to sram
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LDR R0, =__Vectors
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LDR R1, =core_vector
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BLX R1
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;APBMISC->XOSC16M_CTRL.Word = 0x00014894;
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;.XOSC16M_LP=0 .XOSC16M_CAP_TR=0x14
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LDR R0, =0x00014894
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LDR R1, =0x40031054
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STR R0, [R1]
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; load ft trim
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LDR R1, =trim_load
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BLX R1
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LDR R0, =__main
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BX R0
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ENDP
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; Dummy Exception Handlers (infinite loops here, can be modified)
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NMI_Handler PROC
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EXPORT NMI_Handler [WEAK]
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B .
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ENDP
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HardFault_Handler\
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PROC
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EXPORT HardFault_Handler [WEAK]
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B .
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ENDP
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SVCall_Handler PROC
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EXPORT SVCall_Handler [WEAK]
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B .
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ENDP
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PendSV_Handler PROC
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EXPORT PendSV_Handler [WEAK]
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B .
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ENDP
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SysTick_Handler PROC
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EXPORT SysTick_Handler [WEAK]
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B .
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ENDP
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;peripheral module int ---------------------------------------------------------
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Default_Handler PROC
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EXPORT EXTI_IRQHandler [WEAK]
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EXPORT IWDT_IRQHandler [WEAK]
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EXPORT BLE_IRQHandler [WEAK]
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EXPORT DMAC_IRQHandler [WEAK]
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EXPORT BB_LP_IRQHandler [WEAK]
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EXPORT BTMR_IRQHandler [WEAK]
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EXPORT CTMR_IRQHandler [WEAK]
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EXPORT ATMR_IRQHandler [WEAK]
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EXPORT RTC_IRQHandler [WEAK]
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EXPORT I2C_IRQHandler [WEAK]
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EXPORT SPIM_IRQHandler [WEAK]
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EXPORT SPIS_IRQHandler [WEAK]
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EXPORT UART1_IRQHandler [WEAK]
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EXPORT UART2_IRQHandler [WEAK]
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EXPORT AON_PMU_IRQHandler [WEAK]
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EXPORT LVD33_IRQHandler [WEAK]
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EXPORT BOD12_IRQHandler [WEAK]
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EXPORT USB_IRQHandler [WEAK]
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EXPORT USB_SOF_IRQHandler [WEAK]
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EXPORT FSHC_IRQHandler [WEAK]
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EXPORT MDM_IRQHandler [WEAK]
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EXPORT RF_IRQHandler [WEAK]
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EXTI_IRQHandler
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IWDT_IRQHandler
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BLE_IRQHandler
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DMAC_IRQHandler
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BB_LP_IRQHandler
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BTMR_IRQHandler
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CTMR_IRQHandler
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ATMR_IRQHandler
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RTC_IRQHandler
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I2C_IRQHandler
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SPIM_IRQHandler
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SPIS_IRQHandler
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UART1_IRQHandler
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UART2_IRQHandler
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AON_PMU_IRQHandler
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LVD33_IRQHandler
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BOD12_IRQHandler
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USB_IRQHandler
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USB_SOF_IRQHandler
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FSHC_IRQHandler
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MDM_IRQHandler
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RF_IRQHandler
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B .
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ENDP
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ALIGN
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;*******************************************************************************
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; User Stack and Heap initialization
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;*******************************************************************************
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IF :DEF:__MICROLIB
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EXPORT __initial_sp
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EXPORT __heap_base
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EXPORT __heap_limit
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ELSE
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IMPORT __use_two_region_memory
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EXPORT __user_initial_stackheap
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__user_initial_stackheap
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LDR R0, = Heap_Mem
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LDR R1, = (Stack_Mem + Stack_Size)
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LDR R2, = (Heap_Mem + Heap_Size)
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LDR R3, = Stack_Mem
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BX LR
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ALIGN
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ENDIF
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END
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