59 lines
3.4 KiB
C
59 lines
3.4 KiB
C
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#ifndef _REG_GPIO_H_
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#define _REG_GPIO_H_
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#include "reg_base.h"
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//================================
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//BLOCK GPIO define
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#define GPIO_BASE ((uint32_t)0x40010000)
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#define GPIO_DAT_SET_ADDR_OFFSET 0x000
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#define GPIO_DAT_CLR_ADDR_OFFSET 0x004
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#define GPIO_DAT_TOG_ADDR_OFFSET 0x008
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#define GPIO_DAT_MSK_ADDR_OFFSET 0x00c
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#define GPIO_DAT_ADDR_OFFSET 0x010
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#define GPIO_PIN_ADDR_OFFSET 0x014
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#define GPIO_DIR_SET_ADDR_OFFSET 0x020
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#define GPIO_DIR_CLR_ADDR_OFFSET 0x024
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#define GPIO_DIR_TOG_ADDR_OFFSET 0x028
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#define GPIO_DIR_MSK_ADDR_OFFSET 0x02c
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#define GPIO_DIR_ADDR_OFFSET 0x030
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//================================
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//BLOCK GPIO top struct define
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typedef struct
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{
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__O uint32_t DAT_SET; // 0x000,
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// WR: (1: gpio is set high level, 0: no effect)
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__O uint32_t DAT_CLR; // 0x004,
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// WR: (1: gpio is set low level, 0: no effect)
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__O uint32_t DAT_TOG; // 0x008,
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// WR: (1: gpio state is overturn (1->0 or 0->1))
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__IO uint32_t DAT_MSK; // 0x00c,
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// WR: (1: dat_set, dat_clr, dat_tog, dat can not set, 0: no effect)
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// RD: ()
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__IO uint32_t DAT ; // 0x010,
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// WR: (1: write this register equal to write dat_set, dat_clr, dat_tog)
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// RD: (return current register value)
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__I uint32_t PIN ; // 0x014,
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// RD: (get gpio current state(1: high level, 0: low level))
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__I uint32_t RSV0[2];
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__O uint32_t DIR_SET; // 0x020,
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// WR: (1: set gpio is output, 0: no effect)
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__O uint32_t DIR_CLR; // 0x024,
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// WR: (1: clear gpio output function, 0: no effect)
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__O uint32_t DIR_TOG; // 0x028,
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// WR: (1: gpio direction is overturn (1->0 or 0->1))
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__IO uint32_t DIR_MSK; // 0x02c,
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// WR: (1: dir_set, dir_clr, dir_tog, dir can not set, 0: no effect)
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// RD: ()
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__IO uint32_t DIR ; // 0x030,
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// WR: (write this register equal to write dir_set, dir_clr, dir_tog)
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// RD: (get gpio current direction (1: output, 0: input))
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} GPIO_TypeDef;
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#define GPIO (( GPIO_TypeDef *) GPIO_BASE)
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#endif
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