240 lines
8.1 KiB
C
240 lines
8.1 KiB
C
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/**
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****************************************************************************************
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*
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* @file spi.h
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*
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* @brief Header file - SPI Driver
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*
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****************************************************************************************
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*/
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#ifndef _SPI_H_
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#define _SPI_H_
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#include <stdint.h>
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#include <stdbool.h>
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#include "gpio.h"
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/*
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* DEFINES
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****************************************************************************************
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*/
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/// Bits field of SPI master control @see SPIM_CTRL_TypeDef
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enum spim_ctrl_bfs
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{
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// clock rate = clk/2^(crat+1), 0-11 is supported
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SPIM_CR_CLK_RATE_LSB = 0,
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SPIM_CR_CLK_RATE_MSK = (0x0F << SPIM_CR_CLK_RATE_LSB),
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// clock phase -- 0: sck sample in 1st edge, 1: sck sample in 2nd edge
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SPIM_CR_CLK_PHASE_BIT = (1 << 4),
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// clock polarity -- 0: sck low in idle, 1: sck high in idle
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SPIM_CR_CLK_POLAR_BIT = (1 << 5),
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// work mode -- 0: as mcu, 1: as dma mode
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SPIM_CR_TX_DMA_BIT = (1 << 6),
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SPIM_CR_RX_DMA_BIT = (1 << 7),
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// transfer mode -- 0: disable, 1: enable
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SPIM_CR_INT_EN_BIT = (1 << 8),
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SPIM_CR_TX_EN_BIT = (1 << 9),
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SPIM_CR_RX_EN_BIT = (1 << 10),
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// bits order -- 0: LSB first, 1: MSB first
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SPIM_CR_MSB_FST_BIT = (1 << 11),
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};
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#define SPIM_CR_DFLT (SPIM_CR_MSB_FST_BIT | SPIM_CR_RX_EN_BIT | SPIM_CR_TX_EN_BIT)
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enum spim_staclr_bfs
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{
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SPIM_TXDAT_CLR_BIT = (1 << 0),
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SPIM_RXDAT_CLR_BIT = (1 << 1),
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SPIM_INTFLG_CLR_BIT = (1 << 2),
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SPIM_STATUS_CLR_ALL = 0x07,
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};
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#define SPIM_CS_H(pad) GPIO_DAT_SET(1UL << (pad))
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#define SPIM_CS_L(pad) GPIO_DAT_CLR(1UL << (pad))
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#define SPIM_CS_INIT(pad) \
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dowl( \
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GPIO_DAT_SET(1UL << (pad)); \
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GPIO_DIR_SET(1UL << (pad)); \
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iom_ctrl(pad, IOM_SEL_GPIO); \
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)
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/// Bits field of SPI slave control @see SPIS_CTRL_TypeDef
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enum spis_ctrl_bfs
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{
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// bits order -- 0: MSB first, 1: LSB first
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SPIS_CR_LSB_FST_BIT = (1 << 0),
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// clock polarity -- 0: sck low in idle, 1: sck high in idle
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SPIS_CR_CLK_POLAR_BIT = (1 << 1),
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// clock phase -- 0: sck sample in 1st edge, 1: sck sample in 2nd edge
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SPIS_CR_CLK_PHASE_BIT = (1 << 2),
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// transfer mode -- 0: disable, 1: enable
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SPIS_CR_RX_EN_BIT = (1 << 3),
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SPIS_CR_RXINT_EN_BIT = (1 << 4),
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// work mode -- 0: as mcu, 1: as mode
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SPIS_CR_TX_DMA_BIT = (1 << 5),
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SPIS_CR_RX_DMA_BIT = (1 << 6),
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// work enable -- 0: disable(spis lsbfst spol and spha can be configured only when it is 0)
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SPIS_CR_RUN_EN_BIT = (1 << 7),
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// overtime window -- unit in bit width time
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SPIS_CR_OT_WIN_LSB = 8,
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SPIS_CR_OT_WIN_MSK = (0xFF << SPIS_CR_OT_WIN_LSB),
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SPIS_CR_OT_EN_BIT = (1 << 16),
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SPIS_CR_OTINT_EN_BIT = (1 << 17),
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};
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#define SPIS_CR_DFLT (SPIS_CR_RX_EN_BIT | SPIS_CR_RUN_EN_BIT)
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enum spis_infclr_bfs
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{
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SPIS_RXOVER_CLR_BIT = (1 << 0),
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SPIS_TXDAT_CLR_BIT = (1 << 1),
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SPIS_RXDAT_CLR_BIT = (1 << 2),
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SPIS_RXINT_CLR_BIT = (1 << 3),
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SPIS_OTINT_CLR_BIT = (1 << 4),
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SPIS_INFO_CLR_ALL = 0x1F,
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};
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/*
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* FUNCTION DECLARATION
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****************************************************************************************
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*/
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/**
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****************************************************************************************
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* @brief Init SPI Master Module.
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*
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* @param[in] io_clk io used for SPI clk @see enum pad_idx.
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* @param[in] io_miso io used for SPI miso @see enum pad_idx.
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* @param[in] io_mosi io used for SPI mosi @see enum pad_idx.
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*
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* @note User Control CS IO. Macro SPIM_CS_H & SPIM_CS_L
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****************************************************************************************
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*/
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void spim_init(uint8_t io_clk, uint8_t io_miso, uint8_t io_mosi);
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/**
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****************************************************************************************
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* @brief Config SPI Master.
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*
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* @param[in] ctrl Bits field of value @see enum spim_ctrl_bfs.
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****************************************************************************************
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*/
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void spim_conf(uint32_t ctrl);
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/**
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****************************************************************************************
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* @brief SPI Master Begin.
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*
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* @param[in] data_len The number of byte transimit/receive from SPI.
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****************************************************************************************
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*/
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void spim_begin(uint16_t data_len);
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/**
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****************************************************************************************
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* @brief SPI Master Wait Idle.
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****************************************************************************************
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*/
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void spim_wait(void);
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/**
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****************************************************************************************
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* @brief SPI Master Duplex.
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*
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* @param[in] tx_data SPI transimit data pointer.
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* @param[in] rx_buff SPI receive buff pointer.
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* @param[in] data_len The number of byte receive from SPI.
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****************************************************************************************
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*/
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void spim_duplex(const uint8_t *tx_data, uint8_t *rx_buff, uint16_t data_len);
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/**
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****************************************************************************************
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* @brief SPI Master transimit data.
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*
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* @param[in] tx_data SPI transimit data pointer.
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* @param[in] data_len The number of byte transimit to SPI.
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****************************************************************************************
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*/
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void spim_transimit(const uint8_t *tx_data, uint16_t length);
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/**
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****************************************************************************************
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* @brief SPI Master receive data.
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*
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* @param[in] rx_buff SPI receive buff pointer.
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* @param[in] data_len The number of byte receive from SPI.
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****************************************************************************************
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*/
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void spim_receive(uint8_t *rx_buff, uint16_t length);
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/**
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****************************************************************************************
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* @brief SPI Master Half-Duplex.
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*
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* @param[in] cmd SPI transimit data pointer.
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* @param[in] clen The number of byte transimit to SPI.
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* @param[in] rsp SPI receive buff pointer.
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* @param[in] rlen The number of byte receive from SPI.
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****************************************************************************************
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*/
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void spim_halfdx(const uint8_t *cmd, uint16_t clen, uint8_t *rsp, uint16_t rlen);
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/**
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****************************************************************************************
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* @brief Init SPI Slave Module.
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*
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* @param[in] io_cs io used for SPI cs @see enum pad_idx.
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* @param[in] io_clk io used for SPI clk @see enum pad_idx.
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* @param[in] io_miso io used for SPI miso @see enum pad_idx.
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* @param[in] io_mosi io used for SPI mosi @see enum pad_idx.
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****************************************************************************************
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*/
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void spis_init(uint8_t io_cs, uint8_t io_clk, uint8_t io_miso, uint8_t io_mosi);
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/**
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****************************************************************************************
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* @brief Config SPI Slave.
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*
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* @param[in] ctrl Bits field of value @see enum spis_ctrl_bfs.
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****************************************************************************************
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*/
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void spis_conf(uint32_t ctrl);
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/**
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****************************************************************************************
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* @brief SPI Slave get the received data.
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*
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* @param[in] ch received data.
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*
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* @return true received data success. false received data failed.
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****************************************************************************************
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*/
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bool spis_getc(uint8_t *ch);
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/**
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****************************************************************************************
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* @brief SPI Slave Transmits one byte data.
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*
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* @param[in] ch the data transmited
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*
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****************************************************************************************
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*/
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void spis_putc(uint8_t ch);
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#endif // _SPI_H_
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