219 lines
6.2 KiB
ArmAsm
219 lines
6.2 KiB
ArmAsm
.syntax unified
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.arch armv6-m
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.extern main
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.section .stack
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.align 3
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#ifdef __STACK_SIZE
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.equ Stack_Size, __STACK_SIZE
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#else
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.equ Stack_Size, 0x600
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#endif
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.globl __StackTop
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.globl __StackLimit
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__StackLimit:
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.space Stack_Size
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.size __StackLimit, . - __StackLimit
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__StackTop:
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.size __StackTop, . - __StackTop
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.section .heap
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.align 3
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.equ Heap_Size, 0
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.globl __HeapBase
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.globl __HeapLimit
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__HeapBase:
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.if Heap_Size
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.space Heap_Size
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.endif
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.size __HeapBase, . - __HeapBase
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__HeapLimit:
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.size __HeapLimit, . - __HeapLimit
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.section .isr_vector
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.align 2
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.globl __isr_vector
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__isr_vector:
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.long __StackTop /* Top of Stack */
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.long Reset_Handler /* Reset Handler */
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.long NMI_Handler /* NMI Handler */
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.long HardFault_Handler /* Hard Fault Handler */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long SVC_Handler /* SVCall Handler */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long PendSV_Handler /* PendSV Handler */
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.long SysTick_Handler /* SysTick Handler */
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/* External interrupts */
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.long EXTI_IRQHandler /* 0 */
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.long IWDT_IRQHandler /* 1 */
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.long BLE_IRQHandler /* 2 */
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.long DMAC_IRQHandler /* 3 */
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.long BB_LP_IRQHandler /* 4 */
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.long BTMR_IRQHandler /* 5 */
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.long CTMR1_IRQHandler /* 6 */
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.long ADMR1_IRQHandler /* 7 */
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.long RTC_IRQHandler /* 8 */
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.long I2C1_IRQHandler /* 9 */
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.long SPIM_IRQHandler /* 10*/
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.long SPIS_IRQHandler /* 11 */
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.long UART1_IRQHandler /* 12 */
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.long UART2_IRQHandler /* 13 */
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.long AON_PMU_IRQHandler /* 14 */
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.long LVD33_IRQHandler /* 15 */
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.long BOD12_IRQHandler /* 16 */
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.long USB_IRQHandler /* 17 */
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.long USB_SOF_IRQHandler /* 18 */
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.long FSHC_IRQHandler /* 19 */
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.long 0 /* 20 Reserved*/
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.long 0 /* 21 Reserved*/
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.long 0 /* 22 Reserved*/
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.long 0 /* 23 Reserved*/
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.long 0 /* 24 Reserved*/
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.long 0 /* 25 Reserved*/
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.long 0 /* 26 Reserved*/
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.long 0 /* 27 Reserved*/
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.long 0 /* 28 Reserved*/
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.long 0 /* 29 Reserved*/
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.long 0 /* 30 Reserved*/
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.long 0 /* 31 Reserved*/
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.size __isr_vector, . - __isr_vector
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.text
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.thumb
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.thumb_func
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.align 1
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.globl Reset_Handler
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.type Reset_Handler, %function
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.section ".text.user_irq_handler"
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Reset_Handler:
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ldr r1, =__etext
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ldr r2, =__data_start__
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ldr r3, =__data_end__
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subs r3, r2
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ble .L_loop1_done
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.L_loop1:
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subs r3, #4
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ldr r0, [r1,r3]
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str r0, [r2,r3]
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bgt .L_loop1
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.L_loop1_done:
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/* Single BSS section scheme.
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*
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* The BSS section is specified by following symbols
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* __bss_start__: start of the BSS section.
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* __bss_end__: end of the BSS section.
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*
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* Both addresses must be aligned to 4 bytes boundary.
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*/
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ldr r1, =__bss_start__
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ldr r2, =__bss_end__
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movs r0, 0
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subs r2, r1
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ble .L_loop3_done
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.L_loop3:
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subs r2, #4
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str r0, [r1, r2]
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bgt .L_loop3
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.L_loop3_done:
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bl main
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.pool
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.size Reset_Handler, . - Reset_Handler
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/* Dummy Exception Handlers (infinite loops which can be modified) */
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.weak NMI_Handler
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.type NMI_Handler, %function
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NMI_Handler:
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b .
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.size NMI_Handler, . - NMI_Handler
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.weak HardFault_Handler
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.type HardFault_Handler, %function
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HardFault_Handler:
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b .
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.size HardFault_Handler, . - HardFault_Handler
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.weak SVC_Handler
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.type SVC_Handler, %function
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SVC_Handler:
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b .
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.size SVC_Handler, . - SVC_Handler
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.weak PendSV_Handler
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.type PendSV_Handler, %function
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PendSV_Handler:
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b .
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.size PendSV_Handler, . - PendSV_Handler
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.weak SysTick_Handler
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.type SysTick_Handler, %function
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SysTick_Handler:
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b .
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.size SysTick_Handler, . - SysTick_Handler
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.globl Default_Handler
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.type Default_Handler, %function
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Default_Handler:
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b .
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.size Default_Handler, . - Default_Handler
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/* Macro to define default handlers. Default handler
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* will be weak symbol and just dead loops. They can be
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* overwritten by other handlers */
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.macro def_irq_handler handler_name
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.weak \handler_name
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.set \handler_name, Default_Handler
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.endm
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def_irq_handler EXTI_IRQHandler /* 0 */
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def_irq_handler IWDT_IRQHandler /* 1 */
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def_irq_handler BLE_IRQHandler /* 2 */
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def_irq_handler DMAC_IRQHandler /* 3 */
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def_irq_handler BB_LP_IRQHandler /* 4 */
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def_irq_handler BTMR_IRQHandler /* 5 */
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def_irq_handler CTMR1_IRQHandler /* 6 */
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def_irq_handler ADMR1_IRQHandler /* 7 */
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def_irq_handler RTC_IRQHandler /* 8 */
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def_irq_handler I2C1_IRQHandler /* 9 */
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def_irq_handler SPIM_IRQHandler /* 10*/
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def_irq_handler SPIS_IRQHandler /* 11 */
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def_irq_handler UART1_IRQHandler /* 12 */
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def_irq_handler UART2_IRQHandler /* 13 */
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def_irq_handler AON_PMU_IRQHandler /* 14 */
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def_irq_handler LVD33_IRQHandler /* 15 */
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def_irq_handler BOD12_IRQHandler /* 16 */
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def_irq_handler USB_IRQHandler /* 17 */
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def_irq_handler USB_SOF_IRQHandler /* 18 */
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def_irq_handler FSHC_IRQHandler /* 19 */
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.end
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